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Renesas Electronics /R7FA4M1AB /SSIE0 /SSISCR

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Interpret as SSISCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (000)RDFS0Reserved0 (000)TDES0Reserved0Reserved

TDES=000, RDFS=000

Description

Status Control Register

Fields

RDFS

RDF Setting Condition Select

0 (000): SSIFRDR has one stage or more data size

1 (001): SSIFRDR has two stages or more data size (snip)

6 (110): SSIFRDR has seven stages or more data size

7 (111): SSIFRDR has eight stages or more data size.
Reserved

These bits are read as 00000. The write value should be 00000.
TDES

TDE Setting Condition Select

0 (000): SSIFTDR has one stage or more free space

1 (001): SSIFTDR has two stages or more free space (snip)

6 (110): SSIFTDR has seven stages or more free space

7 (111): SSIFTDR has eight stages or more free space.
Reserved

These bits are read as 00000. The write value should be 00000.
Reserved

These bits are read as 0000000000000000. The write value should be 0000000000000000.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data